Principal Engineer - Device (Technology)

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Job Description:

We are seeking a highly motivated Principal Device Technology Engineer to join our Technology Development Group in San Jose, CA. This position is part of the FPGA (Field Programmable Gate Array) Business Unit, which is a leader in research, development, and manufacturing of highly reliable non-volatile Field Programmable Gate Arrays. In this role, the candidate will be responsible for next generation FinFet technology development. The ideal candidate will have a background in SRAM and interconnect modeling and characterization and a strong ability to collaborate with Design and Foundry partners, solve technical problems, and manage projects.

Responsibilities:

• Next generation FinFet devices and memories test chip development and characterization
• Work closely with Design Fabric team to develop test routines to test next generation FPGA Configuration memory macros.
• Characterize and simulate SRAM bias modes and define SAFE operating area.
• Develop and characterize latch-up design rules
• Provide quarterly reports on SPICE and interconnect model health.
• Develop and characterize test-chips with focus on ring oscillators and SRAM devices.
• Provide regular feedback on process development progress based on device level etest.
• Own and implement electrical characterization of a variety of semiconductor devices.
• Employ strong data analytical skills in automating data analysis methods.

Requirements/Qualifications:

• B.S. in Engineering or a related technical discipline.
• 10+ years of experience in the semiconductor industry.
• Experience in the operation and automation of semiconductor instrumentation.
• Knowledge of JMP software or other data analysis and statistical tools.
• Knowledge of layout and PDK tools.
• Demonstrated adaptability and flexibility in a fast-paced, evolving environment.
• Excellent verbal and written communication skills, with the ability to convey complex technical concepts to cross-functional teams.
• Proactive problem-solving attitude and a willingness to take initiative in addressing technical challenges.

Preferred Qualifications:

• Strong knowledge of solid state physics, SRAM memories and latch up design rules.
• Knowledge of SPICE simulators and Interconnect modeling.
• Experience with C++ and Python.

Travel Time:

Physical Attributes:

Physical Requirements:

Pay Range:

Benefits of working at Microchip

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

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